【海思应用篇】-（4）GPIO内核配置

【海思应用篇】-（4）GPIO内核配置

海思每个芯片都有好多组的GPIO芯片，有时候我们发现明明有好多组设备，但是在设备/dev下找不到那么多，这是可以通过设备树映射出设备的节点。

~ # ls -l /dev/gp*

crw——- 1 root root 254, 0 Jan 1 1970 /dev/gpiochip0

crw——- 1 root root 254, 1 Jan 1 1970 /dev/gpiochip1

crw——- 1 root root 254, 10 Jan 1 1970 /dev/gpiochip10

crw——- 1 root root 254, 11 Jan 1 1970 /dev/gpiochip11

crw——- 1 root root 254, 12 Jan 1 1970 /dev/gpiochip12

crw——- 1 root root 254, 13 Jan 1 1970 /dev/gpiochip13

crw——- 1 root root 254, 14 Jan 1 1970 /dev/gpiochip14

crw——- 1 root root 254, 15 Jan 1 1970 /dev/gpiochip15

crw——- 1 root root 254, 16 Jan 1 1970 /dev/gpiochip16

crw——- 1 root root 254, 17 Jan 1 1970 /dev/gpiochip17

crw——- 1 root root 254, 18 Jan 1 1970 /dev/gpiochip18

crw——- 1 root root 254, 19 Jan 1 1970 /dev/gpiochip19

crw——- 1 root root 254, 2 Jan 1 1970 /dev/gpiochip2

crw——- 1 root root 254, 20 Jan 1 1970 /dev/gpiochip20

crw——- 1 root root 254, 21 Jan 1 1970 /dev/gpiochip21

crw——- 1 root root 254, 22 Jan 1 1970 /dev/gpiochip22

crw——- 1 root root 254, 23 Jan 1 1970 /dev/gpiochip23

crw——- 1 root root 254, 24 Jan 1 1970 /dev/gpiochip24

crw——- 1 root root 254, 25 Jan 1 1970 /dev/gpiochip25

crw——- 1 root root 254, 3 Jan 1 1970 /dev/gpiochip3

crw——- 1 root root 254, 4 Jan 1 1970 /dev/gpiochip4

crw——- 1 root root 254, 5 Jan 1 1970 /dev/gpiochip5

crw——- 1 root root 254, 6 Jan 1 1970 /dev/gpiochip6

crw——- 1 root root 254, 7 Jan 1 1970 /dev/gpiochip7

crw——- 1 root root 254, 8 Jan 1 1970 /dev/gpiochip8

crw——- 1 root root 254, 2 Jan 1 1970 /dev/gpiochip2

crw——- 1 root root 254, 20 Jan 1 1970 /dev/gpiochip20

crw——- 1 root root 254, 21 Jan 1 1970 /dev/gpiochip21

crw——- 1 root root 254, 22 Jan 1 1970 /dev/gpiochip22

crw——- 1 root root 254, 23 Jan 1 1970 /dev/gpiochip23

crw——- 1 root root 254, 24 Jan 1 1970 /dev/gpiochip24

crw——- 1 root root 254, 25 Jan 1 1970 /dev/gpiochip25

crw——- 1 root root 254, 3 Jan 1 1970 /dev/gpiochip3

crw——- 1 root root 254, 4 Jan 1 1970 /dev/gpiochip4

crw——- 1 root root 254, 5 Jan 1 1970 /dev/gpiochip5

crw——- 1 root root 254, 6 Jan 1 1970 /dev/gpiochip6

crw——- 1 root root 254, 7 Jan 1 1970 /dev/gpiochip7

crw——- 1 root root 254, 8 Jan 1 1970 /dev/gpiochip8

crw——- 1 root root 254, 9 Jan 1 1970 /dev/gpiochip9

1.内核配置

1.1 hi3531dv200.dtsi添加

gpio_chip0: gpio_chip@11090000 {

compatible = “arm,pl061”, “arm,primecell”;

reg = <0x11090000 0x1000>;

interrupts = ;

#gpio-cells = <2>;

clocks = <&clock HI3531DV200_FIXED_50M>;

clock-names = “apb_pclk”;

status = “disabled”;

};

gpio_chip1: gpio_chip@11091000 {

compatible = “arm,pl061”, “arm,primecell”;

reg = <0x11091000 0x1000>;

interrupts = ;

#gpio-cells = <2>;

clocks = <&clock HI3531DV200_FIXED_50M>;

clock-names = “apb_pclk”;

status = “disabled”;

};

gpio_chip2: gpio_chip@11092000 {

compatible = “arm,pl061”, “arm,primecell”;

reg = <0x11092000 0x1000>;

interrupts = ;

#gpio-cells = <2>;

clocks = <&clock HI3531DV200_FIXED_50M>;

clock-names = “apb_pclk”;

status = “disabled”;

};

gpio_chip3: gpio_chip@11093000 {

compatible = “arm,pl061”, “arm,primecell”;

reg = <0x11093000 0x1000>;

interrupts = ;

#gpio-cells = <2>;

clocks = <&clock HI3531DV200_FIXED_50M>;

clock-names = “apb_pclk”;

status = “disabled”;

};

。。。。。

gpio_chip24: gpio_chip@110A8000 {

compatible = “arm,pl061”, “arm,primecell”;

reg = <0x110A8000 0x1000>;

interrupts = ;

#gpio-cells = <2>;

clocks = <&clock HI3531DV200_FIXED_50M>;

clock-names = “apb_pclk”;

status = “disabled”;

};

gpio_chip25: gpio_chip@110A9000 {

compatible = “arm,pl061”, “arm,primecell”;

reg = <0x110A9000 0x1000>;

interrupts = ;

#gpio-cells = <2>;

clocks = <&clock HI3531DV200_FIXED_50M>;

clock-names = “apb_pclk”;

status = “disabled”;

};

1.2 hi3531dv200-demb.dts 使能状态

aliases {

serial0 = &uart0;

serial1 = &uart1;

serial2 = &uart2;

serial3 = &uart3;

serial4 = &uart4;

i2c0 = &i2c_bus0;

i2c1 = &i2c_bus1;

spi0 = &spi_bus0;

gpio0 = &gpio_chip0;

gpio1 = &gpio_chip1;

gpio2 = &gpio_chip2;

gpio3 = &gpio_chip3;

gpio4 = &gpio_chip4;

gpio5 = &gpio_chip5;

gpio6 = &gpio_chip6;

gpio7 = &gpio_chip7;

gpio8 = &gpio_chip8;

gpio9 = &gpio_chip9;

gpio10 = &gpio_chip10;

gpio11 = &gpio_chip11;

gpio12 = &gpio_chip12;

gpio13 = &gpio_chip13;

gpio14 = &gpio_chip14;

gpio15 = &gpio_chip15;

gpio16 = &gpio_chip16;

gpio17 = &gpio_chip17;

gpio18 = &gpio_chip18;

gpio19 = &gpio_chip19;

gpio20 = &gpio_chip20;

gpio21 = &gpio_chip21;

gpio22 = &gpio_chip22;

gpio23 = &gpio_chip23;

gpio24 = &gpio_chip24;

gpio25 = &gpio_chip25;

};

3.编译内核

重新编译内核，烧录 就会在设备节点生成各个gpio节点，就可以操作相应的gpio。